Red Pitaya SDRlab 122-16 External Clock Standard Kit

The Red Pitaya SDRlab 122-16 External Clock Standard Kit is a high-performance SDR and RF development platform designed for applications that require an external precision clock, synchronized RF acquisition, or tighter timing control than a standalone oscillator can provide. Based on the Xilinx Zynq-7020 SoC, it combines dual 16-bit RF inputs, dual 14-bit RF outputs, FPGA processing, dual-core ARM Cortex-A9 computing, Gigabit Ethernet, and extensive expansion interfaces in one compact platform.

This version is factory-modified for an external ADC clock and is especially suited to software-defined radio, HF experimentation, synchronized multi-device systems, RF prototyping, communications research, FFT analysis, and other demanding signal acquisition and generation applications.

Important External Clock Requirement

The SDRlab 122-16 External Clock requires a valid external 122.88MHz clock signal for normal RF acquisition and generation operation. The onboard 122.88MHz oscillator is bypassed on this version, so the FPGA signal-processing path will not operate correctly without an external clock connected through the E2 extension interface.

This makes the External Clock version ideal when the system must be synchronized to laboratory equipment, a shared timing source, or other Red Pitaya devices.

Dual 16-Bit RF Inputs

The board provides two simultaneous 16-bit analog input channels with 50-ohm impedance and a sampling rate of 122.88MS/s when operated from a 122.88MHz external clock.

• 2 simultaneous RF input channels
• 16-bit ADC resolution
• 122.88MS/s sampling rate
• 50-ohm input impedance
• AC-coupled RF inputs
• Approximately 300kHz to 550MHz input bandwidth
• 0.5Vpp / approximately -2dBm full-scale input range

Dual 14-Bit RF Outputs

Two 14-bit DAC channels allow the SDRlab 122-16 to generate RF and test signals directly from the FPGA and software environment.

• 2 RF output channels
• 14-bit DAC resolution
• Approximately 122.88MS/s sampling rate
• 50-ohm output load
• AC-coupled RF outputs
• Approximately 300kHz to 60MHz output bandwidth
• Approximately ±0.5V / +4dBm full-scale output

Xilinx Zynq-7020 FPGA and ARM Processing

At the heart of the SDRlab 122-16 is the Xilinx Zynq-7020 SoC, combining programmable FPGA logic with a dual-core ARM Cortex-A9 processor. This architecture allows high-speed signal processing to run directly in FPGA hardware while Linux applications, network services, control software, and user programs run on the ARM processor.

The larger Zynq-7020 FPGA provides substantial real-time processing resources for SDR receivers, transmitters, FFT processing, digital filtering, modulation, demodulation, and custom RF algorithms.

External Clock Synchronization

The external clock version is factory prepared to accept its ADC clock through the E2 extension connector. A suitable differential LVDS clock source can be used to synchronize the Red Pitaya with external RF equipment or multiple compatible boards.

This is particularly useful for synchronized acquisition, diversity reception, coherent RF experiments, phased systems, and measurement setups where timing consistency between instruments is important.

Designed for SDR and RF Applications

The SDRlab series is optimized for radio-frequency experimentation and software-defined radio. Its 50-ohm analog front end, high-resolution converters, FPGA processing, and external clock support make it a flexible alternative to building a complete RF acquisition platform from separate components.

Key Features

• Red Pitaya SDRlab 122-16 External Clock edition
• Factory-modified for external clock operation
• External 122.88MHz clock required for full RF operation
• Xilinx Zynq-7020 SoC
• Dual-core ARM Cortex-A9 processor
• 512MB system RAM
• 2 × 16-bit RF ADC inputs
• 2 × 14-bit RF DAC outputs
• 122.88MS/s converter architecture
• 50-ohm RF inputs and outputs
• AC-coupled analog front end
• Gigabit Ethernet connectivity
• USB connectivity
• Optional Wi-Fi using a compatible USB Wi-Fi dongle
• Digital and analog expansion I/O
• I2C, SPI, UART and CAN interfaces
• Compatible with open-source Red Pitaya software
• Supports custom FPGA and software development

Connectivity and Expansion

• 1Gbit Ethernet
• USB connectivity
• Wi-Fi support through compatible dongle
• Digital GPIO expansion
• Analog inputs and outputs through extension connectors
• I2C interface
• SPI interface
• UART interface
• CAN support
• External trigger support
• SATA-based daisy-chain connectivity

Software and Remote Control

The SDRlab platform can be controlled from a standard web browser and integrates with Red Pitaya applications for measurement and RF experimentation. Developers can also control the board remotely and build custom workflows using supported programming environments.

• Web-based Red Pitaya applications
• Oscilloscope
• Signal generator
• Spectrum analysis
• Logic analyzer
• SDR applications
• VNA applications
• Python control
• C development
• MATLAB integration
• LabVIEW integration
• Scilab support

Typical Applications

• Software-defined radio
• HF and 50MHz radio applications
• External-clock synchronized RF systems
• Multi-board synchronized acquisition
• Diversity radio systems
• Reverse Beacon Network stations
• Skimmer Server setups
• Communications research
• FFT and spectral analysis
• Digital signal processing development
• RF prototyping
• Electromagnetic measurements
• University and research laboratories
• Custom radio and test equipment development

Technical Specifications

• Processor: dual-core ARM Cortex-A9
• FPGA: Xilinx Zynq-7020
• RAM: 512MB
• ADC channels: 2
• ADC resolution: 16-bit
• ADC sampling rate: 122.88MS/s with 122.88MHz clock
• RF input impedance: 50 ohms
• RF input coupling: AC
• RF input bandwidth: approximately 300kHz to 550MHz
• DAC channels: 2
• DAC resolution: 14-bit
• DAC sampling rate: approximately 122.88MS/s
• RF output impedance: 50 ohms
• RF output coupling: AC
• RF output bandwidth: approximately 300kHz to 60MHz
• Ethernet: 1Gbit
• System storage: microSD
• External clock input: differential LVDS through E2 connector

What’s in the Box?

• 1 × Red Pitaya SDRlab 122-16 External Clock board
• 1 × 16GB Class 10 microSD card
• 1 × 1m Ethernet cable
• 1 × 5V / 2A power supply

External Clock Notice

An external clock generator is not listed as part of the standard kit contents. A suitable clock source must therefore be available separately before the External Clock model can be used for normal FPGA-based RF acquisition and generation.

Who Is This Version For?

Choose the SDRlab 122-16 External Clock version when your application requires a shared high-quality clock, synchronized RF acquisition, coherent multi-device operation, or integration with existing laboratory timing infrastructure. If external synchronization is not required, the standard SDRlab 122-16 with its onboard oscillator may be the more convenient option.