GeekRF One PlutoSDR Compatible SDR AD9363 AD9361 Zynq 7020 2x2 MIMO 70MHz to 6GHz Gigabit Ethernet
€31316 €41722
GeekRF One PlutoSDR Compatible SDR AD9363 AD9361 Zynq 7020 2x2 MIMO 70MHz to 6GHz Gigabit Ethernet
GKRF-PLTS-H6ZW9B
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Description
The GeekRF One is a high-performance software defined radio platform inspired by the ADI ADALM-PLUTO and enhanced for advanced SDR experimentation and communication. Built around the Xilinx Zynq 7020 FPGA and AD9363 (modded to AD9361), it supports true 2x2 MIMO operation with two transmit and two receive channels, covering a frequency range from 70 MHz to 6 GHz and up to 56 MHz signal bandwidth per channel.
Main Features and Improvements
- RFIC: AD9363 (hacked to AD9361), 2x2 MIMO, 70 MHz–6 GHz, 200 kHz–56 MHz bandwidth
- FPGA: Xilinx Zynq 7020, 512 MB DDR3 RAM, 32 MB flash, TF card slot for storage expansion
- Clock: 0.5 ppm TCXO, supports VCTCXO for high frequency stability
- Interfaces: Gigabit Ethernet, USB 3.0 OTG, USB-JTAG, ZED+FMCOMMS3 port
- Antennas: 2x2 MIMO SMA connectors for simultaneous dual transmit and receive
- Power: 5V (MicroUSB), robust digital power rails, CNC housing for thermal management
Software and Compatibility
- Supports PlutoSDR firmware, compatible with GNU Radio, Matlab, Openwifi, ZED, FMCOMMS3
- Ready for SDR experimentation, wireless research, and advanced learning projects
- TF card comes preloaded with system files for quick setup and tutorials
Use Cases and Applications
- 2x2 MIMO SDR wireless communications, protocol development, and signal analysis
- Real-time spectrum monitoring and wideband signal processing
- Base station and UE simulation, IoT and Openwifi research, ZED+FMCOMMS3 learning
- Educational labs, SDR development, and rapid prototyping
- Custom SDR projects using Matlab, GNU Radio, and PlutoSDR ecosystem
Products questions
Ask question
David Lazaro
05/24/2026, 17:58
Is the AD9363 physically installed and hardware-unlocked as an AD9361, or is it only enabled through firmware? Is the external 10 MHz reference input/output connected directly to the AD936x RF transceiver, or only to the FPGA? Are schematics, HDL sources, and hardware design files available? Is the USB-JTAG interface based on a native FTDI/Xilinx implementation? Which exact TCXO/VCTCXO model and manufacturer is used on the board?
SDRstore Support
06/05/2026, 17:04
Hi David, Thank you for your detailed questions. The board has a physically installed AD9363 RF transceiver. The extended AD9361-like frequency range and bandwidth are enabled through the software configuration of the AD9363; the RFIC is not physically replaced with an AD9361. The currently available documentation confirms that the board includes USB-JTAG and a high-stability ±0.5 ppm TCXO, with support for VCTCXO configurations. However, the manufacturer has not provided sufficiently detailed documentation for us to confirm the following points: Whether the external 10 MHz reference input/output is routed directly to the AD936x RF transceiver or through the FPGA The exact USB-JTAG bridge implementation and whether it uses a specific FTDI or native Xilinx solution The exact TCXO or VCTCXO manufacturer and part number The availability of complete HDL sources and hardware design files for this specific board revision Schematics and firmware resources may be available from the manufacturer, but they are not currently included as downloadable files with the retail product listing. If any of these implementation details are essential for your project, please contact us before placing the order and we will request confirmation for the specific production batch. Best regards.
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